Part Number Hot Search : 
G65SC51 AFB0805H PTZ11B BR20100 IDT74FC BR20100 1GVCDK MA160
Product Description
Full Text Search
 

To Download HGT1S7N60A4S Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 TM
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4
Data Sheet June 2000 File Number 4826.2
600V, SMPS Series N-Channel IGBT
The HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4 and HGTP7N60A4 are MOS gated high voltage switching devices combining the best features of MOSFETs and bipolar transistors. These devices have the high input impedance of a MOSFET and the low on-state conduction loss of a bipolar transistor. The much lower on-state voltage drop varies only moderately between 25oC and 150oC. This IGBT is ideal for many high voltage switching applications operating at high frequencies where low conduction losses are essential. This device has been optimized for high frequency switch mode power supplies. Formerly Developmental Type TA49331.
Features
* >100kHz Operation at 390V, 7A * 200kHz Operation at 390V, 5A * 600V Switching SOA Capability * Typical Fall Time. . . . . . . . . . . . . . . . . . . .75ns at TJ = 125oC * Low Conduction Loss * Temperature Compensating SABERTM Model www.intersil.com
Symbol
C
Ordering Information
G
PART NUMBER HGTD7N60A4S HGT1S7N60A4S HGTG7N60A4 HGTP7N60A4
PACKAGE TO-252AA TO-263AB TO-247 TO-220AB
BRAND 7N60A4 7N60A4 7N60A4 7N60A4
E
NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-252AA and TO-263AB variant in tape and reel, e.g., HGTD7N60A4S9A.
Packaging
JEDEC STYLE TO-247
E C G
JEDEC TO-220AB
E C
G
COLLECTOR (FLANGE)
COLLECTOR (FLANGE)
JEDEC TO-252AA
JEDEC TO-263AB
G E
COLLECTOR (FLANGE)
G E
COLLECTOR (FLANGE)
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS 4,364,073 4,598,461 4,682,195 4,803,533 4,888,627 4,417,385 4,605,948 4,684,413 4,809,045 4,890,143 4,430,792 4,620,211 4,694,313 4,809,047 4,901,127 4,443,931 4,631,564 4,717,679 4,810,665 4,904,609 4,466,176 4,639,754 4,743,952 4,823,176 4,933,740 4,516,143 4,639,762 4,783,690 4,837,606 4,963,951 4,532,534 4,641,162 4,794,432 4,860,080 4,969,027 4,587,713 4,644,637 4,801,986 4,883,767
2-1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. SABERTM is a trademark of Analogy, Inc. | 1-888-INTERSIL or 321-724-7143 Intersil and Design is a trademark of Intersil Corporation. | Copyright (c) Intersil Corporation 2000
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified ALL TYPES Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BVCES Collector Current Continuous At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25 At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110 Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ICM Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM Switching Safe Operating Area at TJ = 150oC, Figure 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . SSOA Single Pulse Avalanche Energy at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Lead Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Tech Brief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TPKG 600 34 14 56 20 30 35A at 600V 25mJ at 7A 125 1.0 -55 to 150 300 260 UNITS V A A A V V
W W/oC oC
oC oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. Pulse width limited by maximum junction temperature.
Electrical Specifications
PARAMETER
TJ = 25oC, Unless Otherwise Specified SYMBOL BVCES BVECS ICES TEST CONDITIONS IC = 250A, VGE = 0V IC = 10mA, VGE = 0V VCE = 600V TJ = 25oC TJ = 125oC TJ = 25oC TJ = 125oC MIN 600 20 4.5 35 25 VGE = 15V VGE = 20V TYP 1.9 1.6 5.9 9.0 37 48 11 11 100 45 55 120 60 MAX 250 2 2.7 2.2 7.0 250 45 60 150 75 UNITS V V A mA V V V nA A mJ V nC nC ns ns ns ns J J J
Collector to Emitter Breakdown Voltage Emitter to Collector Breakdown Voltage Collector to Emitter Leakage Current
Collector to Emitter Saturation Voltage
VCE(SAT)
IC = 7A, VGE = 15V
Gate to Emitter Threshold Voltage Gate to Emitter Leakage Current Switching SOA Pulsed Avalanche Energy Gate to Emitter Plateau Voltage On-State Gate Charge
VGE(TH) IGES SSOA EAS VGEP Qg(ON)
IC = 250A, VCE = 600V VGE = 20V TJ = 150oC, RG = 25, VGE = 15V L = 100H, VCE = 600V ICE = 7A, L = 500H IC = 7A, VCE = 300V IC = 7A, VCE = 300V
Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time Current Fall Time Turn-On Energy (Note 2) Turn-On Energy (Note 2) Turn-Off Energy (Note 3)
td(ON)I trI td(OFF)I tfI EON1 EON2 EOFF
IGBT and Diode at TJ = 25oC ICE = 7A VCE = 390V VGE = 15V RG = 25 L = 1mH Test Circuit (Figure 20)
2-2
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4
Electrical Specifications
PARAMETER Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time Current Fall Time Turn-On Energy (Note 2) Turn-On Energy (Note 2) Turn-Off Energy (Note 3) Thermal Resistance Junction To Case NOTES: 2. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. EON1 is the turn-on loss of the IGBT only. EON2 is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in Figure 20. 3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. TJ = 25oC, Unless Otherwise Specified (Continued) SYMBOL td(ON)I trI td(OFF)I tfI EON1 EON2 EOFF RJC TEST CONDITIONS IGBT and Diode at TJ = 125oC ICE = 7A VCE = 390V VGE = 15V RG = 25 L = 1mH Test Circuit (Figure 20) MIN TYP 10 7 130 75 50 200 125 MAX 150 85 215 170 1.0 UNITS ns ns ns ns J J J
oC/W
Typical Performance Curves
35 ICE , DC COLLECTOR CURRENT (A)
Unless Otherwise Specified
ICE, COLLECTOR TO EMITTER CURRENT (A) 40 TJ = 150oC, RG = 25, VGE = 15V, L = 100H
VGE = 15V 30 25 20 15 10 5 0 25 50 75 100 125 150 TC , CASE TEMPERATURE (oC)
30
20
10
0
0
100
200
300
400
500
600
700
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 1. DC COLLECTOR CURRENT vs CASE TEMPERATURE
500 fMAX, OPERATING FREQUENCY (kHz)
FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA
75oC 15V
VCE = 390V, RG = 25, TJ = 125oC
14 12 10 8 6 4 tSC ISC
120 100 80 60 40 20
200
100 fMAX1 = 0.05 / (td(OFF)I + td(ON)I) fMAX2 = (PD - PC) / (EON2 + EOFF) PC = CONDUCTION DISSIPATION (DUTY FACTOR = 50%) ROJC = 1.0oC/W, SEE NOTES TJ = 125oC, RG = 25, L = 2mH, V CE = 390V 30 1 5 10 20
ICE, COLLECTOR TO EMITTER CURRENT (A)
10
11
12
13
14
15
VGE , GATE TO EMITTER VOLTAGE (V)
FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO EMITTER CURRENT
FIGURE 4. SHORT CIRCUIT WITHSTAND TIME
2-3
ISC, PEAK SHORT CIRCUIT CURRENT (A)
TC
VGE
tSC , SHORT CIRCUIT WITHSTAND TIME (s)
16
140
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4 Typical Performance Curves
ICE, COLLECTOR TO EMITTER CURRENT (A) 30 25 TJ = 125oC 20 15 10 TJ = 25oC 5 0 TJ = 150oC 0 0.5 2.5 1.0 1.5 2.0 VCE, COLLECTOR TO EMITTER VOLTAGE (V) 3.0 DUTY CYCLE < 0.5%, VGE = 12V PULSE DURATION = 250s
Unless Otherwise Specified (Continued)
ICE, COLLECTOR TO EMITTER CURRENT (A) 30 DUTY CYCLE < 0.5%, VGE = 15V PULSE DURATION = 250s 25 20 15 10 5 TJ = 150oC 0 0 0.5 1.0 1.5 2.0 2.5 VCE, COLLECTOR TO EMITTER VOLTAGE (V) 3.0 TJ = 25oC
TJ = 125oC
FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE
FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE
500 EON2 , TURN-ON ENERGY LOSS (J)
EOFF, TURN-OFF ENERGY LOSS (J)
RG = 25, L = 1mH, VCE = 390V
350 RG = 25, L = 1mH, VCE = 390V 300 250 200 TJ = 125oC, VGE = 12V OR 15V 150 100 50 0
400 TJ = 125oC, VGE = 12V, VGE = 15V 300
200
100 TJ = 25oC, VGE = 12V, VGE = 15V 0 0 2 4 6 8 10 12 ICE , COLLECTOR TO EMITTER CURRENT (A) 14
TJ = 25oC, VGE = 12V OR 15V 0 2 4 6 8 10 12 14
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT
FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT
16 td(ON)I, TURN-ON DELAY TIME (ns)
RG = 25, L = 1mH, VCE = 390V TJ = 25oC, VGE = 12V trI , RISE TIME (ns)
40 RG = 25, L = 1mH, VCE = 390V TJ = 25oC, VGE = 12V, VGE = 15V
14
TJ = 125oC, VGE = 12V
30
12
TJ = 25oC, VGE = 15V
20
10
10 TJ = 125oC, VGE = 15V TJ = 125oC, VGE = 12V, VGE = 15V 0 0 4 6 8 10 12 ICE , COLLECTOR TO EMITTER CURRENT (A) 2 14
8
0
2
4
6
8
10
12
14
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO EMITTER CURRENT
FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO EMITTER CURRENT
2-4
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4 Typical Performance Curves
180 td(OFF)I , TURN-OFF DELAY TIME (ns) 160 140 120 VGE = 12V, TJ = 125oC 100 80 VGE = 12V, TJ = 25oC 60 0 2 4 6 8 10 12 14 VGE = 15V, TJ = 25oC VGE = 15V, TJ = 125oC tfI , FALL TIME (ns) RG = 25, L = 1mH, VCE = 390V
Unless Otherwise Specified (Continued)
90 RG = 25, L = 1mH, VCE = 390V 80 70 60 50 40 30 20 TJ = 25oC, VGE = 12V OR 15V
TJ = 125oC, VGE = 12V OR 15V
0
2
4
6
8
10
12
14
ICE , COLLECTOR TO EMITTER CURRENT (A)
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO EMITTER CURRENT
FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER CURRENT
ICE, COLLECTOR TO EMITTER CURRENT (A)
120 100 80 60 40 20 0 TJ = 125oC TJ = -55oC VGE, GATE TO EMITTER VOLTAGE (V) DUTY CYCLE < 0.5%, VCE = 10V PULSE DURATION = 250s TJ = 25oC
15
IG(REF) = 1mA, RL = 43, TJ = 25oC VCE = 600V VCE = 400V
12
9 VCE = 200V
6
3
7
8
9
10
11
12
13
14
15
0
0
5
10
15
20
25
30
35
40
VGE, GATE TO EMITTER VOLTAGE (V)
QG , GATE CHARGE (nC)
FIGURE 13. TRANSFER CHARACTERISTIC
FIGURE 14. GATE CHARGE WAVEFORMS
ETOTAL, TOTAL SWITCHING ENERGY LOSS (J)
800
ETOTAL, TOTAL SWITCHING ENERGY LOSS (mJ)
RG = 25, L = 1mH, VCE = 390V, VGE = 15V ETOTAL = EON2 + EOFF
10
TJ = 125oC, L = 1mH, VCE = 390V, VGE = 15V ETOTAL = EON2 + EOFF
600 ICE = 14A 400 ICE = 7A 200 ICE = 3.5A
1
ICE = 14A
ICE = 7A ICE = 3.5A 0.1 10
0 25
50
75
100
125
150
100 RG, GATE RESISTANCE ()
1000
TC , CASE TEMPERATURE (oC)
FIGURE 15. TOTAL SWITCHING LOSS vs CASE TEMPERATURE
FIGURE 16. TOTAL SWITCHING LOSS vs GATE RESISTANCE
2-5
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4 Typical Performance Curves
1.4 FREQUENCY = 1MHz 1.2 C, CAPACITANCE (nF) 1.0 0.8 0.6 0.4 0.2 CRES 0 0 20 40 60 80 100 COES CIES
Unless Otherwise Specified (Continued)
VCE, COLLECTOR TO EMITTER VOLTAGE (V) 2.8 DUTY CYCLE < 0.5%, TJ = 25oC PULSE DURATION = 250s,
2.6
2.4 ICE = 14A 2.2 ICE = 7A ICE = 3.5A 1.8 9 10 11 12 13 14 15 16 VGE, GATE TO EMITTER VOLTAGE (V)
2.0
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 17. CAPACITANCE vs COLLECTOR TO EMITTER VOLTAGE
FIGURE 18. COLLECTOR TO EMITTER ON-STATE VOLTAGE vs GATE TO EMITTER VOLTAGE
ZJC , NORMALIZED THERMAL RESPONSE
100 0.5
0.2 10-1 0.1 0.05 0.02 0.01 SINGLE PULSE 10-2 10-5 10-4 10-3 10-2 10-1
t1 PD t2
DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZJC X RJC) + TC 100 101
t1 , RECTANGULAR PULSE DURATION (s)
FIGURE 19. IGBT NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE
Test Circuit and Waveforms
RHRP660 90% VGE L = 1mH VCE RG = 25 + 90% ICE VDD = 390V 10% td(OFF)I tfI trI td(ON)I EOFF 10% EON2
-
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT
FIGURE 21. SWITCHING TEST WAVEFORMS
2-6
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4 Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler's body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as "ECCOSORBD LD26" or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gate-voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection - These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended.
Operating Frequency Information
Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows fMAX1 or fMAX2; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 21. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJM. fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON2). The allowable dissipation (PD) is defined by PD = (TJM - TC)/RJC. The sum of device switching and conduction losses must not exceed PD. A 50% duty factor was used (Figure 3) and the conduction losses (PC) are approximated by PC = (VCE x ICE)/2. EON2 and EOFF are defined in the switching waveforms shown in Figure 21. EON2 is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss (ICE x VCE) during turn-off. All tail losses are included in the calculation for EOFF; i.e., the collector current equals zero (ICE = 0).
2-7
ECCOSORBDTM is a trademark of Emerson and Cumming, Inc.
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4 TO-247
3 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE
E A OS Q OR D TERM. 4 OP
INCHES SYMBOL A b b1 b2 c D MIN 0.180 0.046 0.060 0.095 0.020 0.800 0.605 MAX 0.190 0.051 0.070 0.105 0.026 0.820 0.625
MILLIMETERS MIN 4.58 1.17 1.53 2.42 0.51 20.32 15.37 MAX 4.82 1.29 1.77 2.66 0.66 20.82 15.87 NOTES 2, 3 1, 2 1, 2 1, 2, 3 4 4 5 1 -
L1 L
b1 b2 c b
1 2 3 J1 3 2 1
E e e1 J1 L L1 OP Q OR OS
0.219 TYP 0.438 BSC 0.090 0.620 0.145 0.138 0.210 0.195 0.260 0.105 0.640 0.155 0.144 0.220 0.205 0.270
5.56 TYP 11.12 BSC 2.29 15.75 3.69 3.51 5.34 4.96 6.61 2.66 16.25 3.93 3.65 5.58 5.20 6.85
e e1
BACK VIEW
NOTES: 1. Lead dimension and finish uncontrolled in L1. 2. Lead dimension (without solder). 3. Add typically 0.002 inches (0.05mm) for solder coating. 4. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 5. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 6. Controlling dimension: Inch. 7. Revision 1 dated 1-93.
2-8
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4 TO-252AA
SURFACE MOUNT JEDEC TO-252AA PLASTIC PACKAGE
E H1 A A1 SEATING PLANE D L2 1 3 L
b2
b e e1
TERM. 4
b1
L1
c
J1 0.265 (6.7)
SYMBOL A A1 b b1 b2 b3 c D E e e1 H1 J1 L L1 L2 L3
INCHES MIN MAX 0.086 0.094 0.018 0.022 0.028 0.032 0.033 0.045 0.205 0.215 0.190 0.018 0.022 0.270 0.295 0.250 0.265 0.090 TYP 0.180 BSC 0.035 0.045 0.040 0.045 0.100 0.115 0.020 0.025 0.170 0.040 -
MILLIMETERS MIN MAX 2.19 2.38 0.46 0.55 0.72 0.81 0.84 1.14 5.21 5.46 4.83 0.46 0.55 6.86 7.49 6.35 6.73 2.28 TYP 4.57 BSC 0.89 1.14 1.02 1.14 2.54 2.92 0.51 0.64 4.32 1.01 -
NOTES 4, 5 4, 5 4 4, 5 2 4, 5 7 7 4, 6 3 2
b3
L3
0.265 (6.7)
0.070 (1.8) 0.118 (3.0) BACK VIEW 0.063 (1.6) TYP 0.090 (2.3) TYP MINIMUM PAD SIZE RECOMMENDED FOR SURFACE-MOUNTED APPLICATIONS
NOTES: 1. These dimensions are within allowable dimensions of Rev. B of JEDEC TO-252AA outline dated 9-88. 2. L3 and b3 dimensions establish a minimum mounting surface for terminal 4. 3. Solder finish uncontrolled in this area. 4. Dimension (without solder). 5. Add typically 0.002 inches (0.05mm) for solder plating. 6. L1 is the terminal length for soldering. 7. Position of lead to be measured 0.090 inches (2.28mm) from bottom of dimension D. 8. Controlling dimension: Inch. 9. Revision 11 dated 1-00.
1.5mm DIA. HOLE
4.0mm USER DIRECTION OF FEED 2.0mm 1.75mm C L
TO-252AA
16mm TAPE AND REEL
16mm
8.0mm
COVER TAPE
22.4mm
13mm 330mm 50mm
GENERAL INFORMATION 1. 2500 PIECES PER REEL. 2. ORDER IN MULTIPLES OF FULL REELS ONLY. 3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.
16.4mm
2-9
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4 TO-263AB
H1 TERM. 4 D
SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE
E A A1
L2 L1 1 3
L
b e e1
TERM. 4
b1
J1 0.450 (11.43)
c
L3
b2
0.350 (8.89) 0.700 (17.78)
3
1 0.080 TYP (2.03) 0.062 TYP (1.58)
0.150 (3.81)
MINIMUM PAD SIZE RECOMMENDED FOR SURFACE-MOUNTED APPLICATIONS
INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.170 0.180 4.32 4.57 A1 0.048 0.052 1.22 1.32 4, 5 b 0.030 0.034 0.77 0.86 4, 5 b1 0.045 0.055 1.15 1.39 4, 5 b2 0.310 7.88 2 c 0.018 0.022 0.46 0.55 4, 5 D 0.405 0.425 10.29 10.79 E 0.395 0.405 10.04 10.28 e 0.100 TYP 2.54 TYP 7 e1 0.200 BSC 5.08 BSC 7 H1 0.045 0.055 1.15 1.39 J1 0.095 0.105 2.42 2.66 L 0.175 0.195 4.45 4.95 L1 0.090 0.110 2.29 2.79 4, 6 L2 0.050 0.070 1.27 1.77 3 L3 0.315 8.01 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. C of JEDEC TO-263AB outline dated 2-92. 2. L3 and b2 dimensions established a minimum mounting surface for terminal 4. 3. Solder finish uncontrolled in this area. 4. Dimension (without solder). 5. Add typically 0.002 inches (0.05mm) for solder plating. 6. L1 is the terminal length for soldering. 7. Position of lead to be measured 0.120 inches (3.05mm) from bottom of dimension D. 8. Controlling dimension: Inch. 9. Revision 10 dated 5-99.
1.5mm DIA. HOLE
4.0mm USER DIRECTION OF FEED 2.0mm 1.75mm C L
TO-263AB
24mm TAPE AND REEL
24mm
16mm
COVER TAPE
40mm MIN. ACCESS HOLE 30.4mm
13mm 330mm 100mm
GENERAL INFORMATION 1. 800 PIECES PER REEL. 2. ORDER IN MULTIPLES OF FULL REELS ONLY. 3. MEETS EIA-481 REVISION "A" SPECIFICATIONS. 24.4mm
2-10
HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4 TO-220AB
3 LEAD JEDEC TO-220AB PLASTIC PACKAGE
A OP Q H1 D E1 45o D1 TERM. 4 E A1
INCHES SYMBOL A A1 b b1 c D D1 E E1 e e1 MIN 0.170 0.048 0.030 0.045 0.014 0.590 0.395 MAX 0.180 0.052 0.034 0.055 0.019 0.610 0.160 0.410 0.030 0.100 TYP 0.200 BSC 0.235 0.100 0.530 0.130 0.149 0.102 0.255 0.110 0.550 0.150 0.153 0.112
MILLIMETERS MIN 4.32 1.22 0.77 1.15 0.36 14.99 10.04 MAX 4.57 1.32 0.86 1.39 0.48 15.49 4.06 10.41 0.76 2.54 TYP 5.08 BSC 5.97 2.54 13.47 3.31 3.79 2.60 6.47 2.79 13.97 3.81 3.88 2.84 NOTES 3, 4 2, 3 2, 3, 4 5 5 6 2 -
L1
b1 b c
L 60o 1 2 3
e e1
J1
H1 J1 L L1 OP Q
NOTES: 1. These dimensions are within allowable dimensions of Rev. J of JEDEC TO-220AB outline dated 3-24-87. 2. Lead dimension and finish uncontrolled in L1. 3. Lead dimension (without solder). 4. Add typically 0.002 inches (0.05mm) for solder coating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 2 dated 7-97.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil Ltd. 8F-2, 96, Sec. 1, Chien-kuo North, Taipei, Taiwan 104 Republic of China TEL: 886-2-2515-8508 FAX: 886-2-2515-8369
2-11


▲Up To Search▲   

 
Price & Availability of HGT1S7N60A4S

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X